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Volumn 19, Issue 4, 1997, Pages 317-324

High-speed array multipliers based on on-the-fly conversion

(2)  Moh, Sang Man a   Yoon, Suk Han a  

a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK TOPOLOGY;

EID: 0031375834     PISSN: 12256463     EISSN: None     Source Type: Journal    
DOI: 10.4218/etrij.97.0197.0401     Document Type: Article
Times cited : (7)

References (13)
  • 1
    • 0015724965 scopus 로고
    • A two's complement parallel array multiplication algorithm
    • Dec.
    • C. R. Baugh and B. A. Wooley, "A two's complement parallel array multiplication algorithm," IEEE Trans. on Computers, vol. 22, no. 12, pp. 1045-1047, Dec. 1973.
    • (1973) IEEE Trans. on Computers , vol.22 , Issue.12 , pp. 1045-1047
    • Baugh, C.R.1    Wooley, B.A.2
  • 3
    • 0001342967 scopus 로고
    • Some schemes for parallel multipliers
    • May
    • L. Dadda, "Some schemes for parallel multipliers," Alta Frequenza, vol. 19, pp. 349-356, May 1965. Reprinted in Computer Design Development, E. E. Swartzlander Jr., Ed. Rochelle Park, New Jersey: Hayden Book, 1976.
    • (1965) Alta Frequenza , vol.19 , pp. 349-356
    • Dadda, L.1
  • 4
    • 84915726241 scopus 로고
    • Reprinted. Rochelle Park, New Jersey: Hayden Book
    • L. Dadda, "Some schemes for parallel multipliers," Alta Frequenza, vol. 19, pp. 349-356, May 1965. Reprinted in Computer Design Development, E. E. Swartzlander Jr., Ed. Rochelle Park, New Jersey: Hayden Book, 1976.
    • (1976) Computer Design Development
    • Swartzlander Jr., E.E.1
  • 5
    • 0004079718 scopus 로고
    • Englewood Cliffs, New Jersey: Prenctice Hall
    • I. Koren, Computer Arithmetic Algorithms. Englewood Cliffs, New Jersey: Prenctice Hall, 1993. pp. 99-123.
    • (1993) Computer Arithmetic Algorithms , pp. 99-123
    • Koren, I.1
  • 7
    • 0021505260 scopus 로고
    • A CMOS floating-point multiplier
    • Oct.
    • M. Uya, K. Kaneko, and J. Yasui, "A CMOS floating-point multiplier," IEEE J. Solid State Circuits, vol. 19, no. 5, pp. 697-701, Oct. 1984.
    • (1984) IEEE J. Solid State Circuits , vol.19 , Issue.5 , pp. 697-701
    • Uya, M.1    Kaneko, K.2    Yasui, J.3
  • 8
    • 0025519548 scopus 로고
    • Fast multiplication without carry-propagate addition
    • Nov.
    • M. D. Ercegovac and T. Lang, "Fast multiplication without carry-propagate addition," IEEE Trans. on Computers, vol. 39, no. 11, pp. 1385-1390, Nov. 1990.
    • (1990) IEEE Trans. on Computers , vol.39 , Issue.11 , pp. 1385-1390
    • Ercegovac, M.D.1    Lang, T.2
  • 9
    • 0023385902 scopus 로고
    • On-the-fly conversion of redundant into conventional representations
    • July
    • M. D. Ercegovac and T. Lang, "On-the-fly conversion of redundant into conventional representations," IEEE Trans. on Computers, vol. 36, no. 7, pp. 895-897, July 1987.
    • (1987) IEEE Trans. on Computers , vol.36 , Issue.7 , pp. 895-897
    • Ercegovac, M.D.1    Lang, T.2
  • 11
    • 84939378069 scopus 로고
    • A comment on "A Two's complement Parallel Array Multiplication Algorithm"
    • Dec.
    • P. E. Blankenship, "A comment on "A Two's complement Parallel Array Multiplication Algorithm"," IEEE Trans. on Computers, vol. 23, no. 12, pp. 1327, Dec. 1974.
    • (1974) IEEE Trans. on Computers , vol.23 , Issue.12 , pp. 1327
    • Blankenship, P.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.