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Volumn 47, Issue 13, 2002, Pages 1017-1041

Architectural differences of efficient sequential and parallel computers

Author keywords

Computer architecture; Parallel computation; Pipeline organization; Processor architecture; Sequential computation

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; PIPELINE PROCESSING SYSTEMS; PROGRAM PROCESSORS; SEQUENTIAL CIRCUITS;

EID: 0036642082     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1383-7621(02)00064-4     Document Type: Article
Times cited : (13)

References (45)
  • 20
    • 0004302191 scopus 로고
    • Computer Architecture: A Quantitative Approach
    • Morgan Kaufmann Publishers Inc, Palo Alto
    • (1990)
    • Hennessy, J.1    Patterson, D.2
  • 22
    • 84882659059 scopus 로고
    • Communicating Seguential Process
    • Prentice Hall, New York
    • (1985)
    • Hoare, C.1
  • 24
    • 0003819667 scopus 로고
    • Introduction to Parallel Algorithms
    • Addison-Wesley, Reading
    • (1992)
    • Jaja, J.1
  • 34
    • 0004163951 scopus 로고    scopus 로고
    • Multithreaded Processor Design
    • Kluwer Academic Publishers, Boston
    • (1996)
    • Moore, S.1
  • 40


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.