SCOPUS 정보 검색 플랫폼

Computer

Volumn 34, Issue 4, 2001, Pages 59-65

Instruction-level distributed processing

(1) Smith, J E a

a IBM T J WATSON RESEARCH CENTER (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONGESTION CONTROL (COMMUNICATION); MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; TRANSISTORS;

INSTRUCTION-LEVEL DISTRIBUTED PROCESSING (ILDP); MICROARCHITECTURES; MULTITHREADING;

COMPUTER ARCHITECTURE;

EID: 0035311434 PISSN: 00189162 EISSN: None Source Type: Trade Journal
DOI: 10.1109/2.917541 Document Type: Article

Times cited : (18)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.