A high-performance and low-power 32-bit multiply-accumulate unit with single-instruction-multiple-data (SIMD) feature

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 7, 2002, Pages 926-931

  Liao, Yuyun ^a   Roberts, David B ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Complementary pass gate logic; Digital signal processing; Encoding scheme; Low power; Multiply accumulate unit

Indexed keywords

DIGITAL SIGNAL PROCESSING; FIR FILTERS; MICROPROCESSOR CHIPS; NATURAL FREQUENCIES; SIGNAL ENCODING;

SINGLE-INSTRUCTION-MULTIPLE-DATA (SIMD) FEATURES;

CMOS INTEGRATED CIRCUITS;

EID: 0036641433     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.1015692     Document Type: Article

References (10)

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