-
2
-
-
0029231165
-
Optimizing power using transformations
-
Jan.
-
A. P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey and R. Brodersen, "Optimizing power using transformations," IEEE Trans. Computer-Aided Design, vol. 14, pp. 12-51, Jan. 1995.
-
(1995)
IEEE Trans. Computer-Aided Design
, vol.14
, pp. 12-51
-
-
Chandrakasan, A.P.1
Potkonjak, M.2
Mehra, R.3
Rabaey, J.4
Brodersen, R.5
-
3
-
-
0029225181
-
Power profiler: Optimizing ASICs power consumption at the behavioral level
-
June
-
R. S. Martin and J. P. Knight, "Power profiler: Optimizing ASICs power consumption at the behavioral level," in Proc. Design Automation Conf., pp. 42-47, June 1995.
-
(1995)
Proc. Design Automation Conf.
, pp. 42-47
-
-
Martin, R.S.1
Knight, J.P.2
-
4
-
-
0031273490
-
SCALP: An iterative improvement based low-power data path synthesis algorithm
-
Nov.
-
A. Raghunathan and N. K. Jha, "SCALP: An iterative improvement based low-power data path synthesis algorithm," IEEE Trans. Computer-Aided Design, vol. 16, no. 11, pp. 1260-1277, Nov. 1997.
-
(1997)
IEEE Trans. Computer-Aided Design
, vol.16
, Issue.11
, pp. 1260-1277
-
-
Raghunathan, A.1
Jha, N.K.2
-
5
-
-
0033332247
-
High-level synthesis of low power control-flow intensive circuits
-
Dec.
-
K. S. Khouri, G. Lakshminaryana and N. K. Jha, "High-level synthesis of low power control-flow intensive circuits," IEEE Trans. Computer-Aided Design, vol. 18, no. 12, pp. 1715-1729, Dec. 1999.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.18
, Issue.12
, pp. 1715-1729
-
-
Khouri, K.S.1
Lakshminaryana, G.2
Jha, N.K.3
-
6
-
-
0028727716
-
Precomputation-based sequential logic optimization for low power
-
Dec.
-
M. Alidina, J. Monteiro, S. Devadas, A. Ghosh, and M. Papaefthymiou, "Precomputation-based sequential logic optimization for low power," IEEE Trans. VLSI Systems, vol. 2, pp. 426-436, Dec. 1994.
-
(1994)
IEEE Trans. VLSI Systems
, vol.2
, pp. 426-436
-
-
Alidina, M.1
Monteiro, J.2
Devadas, S.3
Ghosh, A.4
Papaefthymiou, M.5
-
7
-
-
0029694559
-
An effective power management scheme for rTL design based on multiple clocks
-
June
-
C. Papachristou, M. Spining, and M. Nourani, "An effective power management scheme for rTL design based on multiple clocks," in Proc. Design Automation Conf., pp. 337-342, June 1996.
-
(1996)
Proc. Design Automation Conf.
, pp. 337-342
-
-
Papachristou, C.1
Spining, M.2
Nourani, M.3
-
8
-
-
0029206334
-
High-level synthesis techniques for reducing the activity of functional unit
-
Apr.
-
E. Mussoll and J. Cortadella, "High-level synthesis techniques for reducing the activity of functional unit," in Proc. Int. Symp. Low Power Design, pp. 99-104, Apr. 1995.
-
(1995)
Proc. Int. Symp. Low Power Design
, pp. 99-104
-
-
Mussoll, E.1
Cortadella, J.2
-
9
-
-
0033340044
-
Controller-based power management for control-flow intensive designs
-
Oct.
-
S. Dey, A. Raghunathan, N. K. Jha, and K. Wakabayashi, "Controller-based power management for control-flow intensive designs," IEEE Trans. Computer-Aided Design, vol. 18, no. 10, pp. 1496-1508, Oct. 1999.
-
(1999)
IEEE Trans. Computer-Aided Design
, vol.18
, Issue.10
, pp. 1496-1508
-
-
Dey, S.1
Raghunathan, A.2
Jha, N.K.3
Wakabayashi, K.4
-
10
-
-
0033097603
-
Power management in high level synthesis
-
Mar.
-
G. Lakshminarayana, A. Raghunanthan, N. K. Jha, and S. Dey, "Power management in high level synthesis," IEEE Trans. VLSI Systems, vol. 7, no. 1, pp. 7-15, Mar. 1999.
-
(1999)
IEEE Trans. VLSI Systems
, vol.7
, Issue.1
, pp. 7-15
-
-
Lakshminarayana, G.1
Raghunanthan, A.2
Jha, N.K.3
Dey, S.4
-
11
-
-
0032306494
-
Transforming control-flow intensive designs to facilitate power management
-
Nov.
-
G. Lakshminarayana, A. Raghunanthan, N. K. Jha, and S. Dey, "Transforming control-flow intensive designs to facilitate power management," in Proc. Int. Conf. Computer-Aided Design, pp. 657-664, Nov. 1998.
-
(1998)
Proc. Int. Conf. Computer-Aided Design
, pp. 657-664
-
-
Lakshminarayana, G.1
Raghunanthan, A.2
Jha, N.K.3
Dey, S.4
-
15
-
-
0010947633
-
-
http://www.cbl.ncsu.edu/benchmarks/
-
-
-
-
16
-
-
0010947075
-
-
http://www.ee.princeton.edu/~lzhong/publications/conloop.vhd
-
-
-
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