Effective power management scheme for RTL design based on multiple clocks

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 337-342

  Papachristou, C ^a   Spinning, M ^a   Nourani, M ^a  

^a CASE WESTERN RESERVE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; FREQUENCY RESPONSE; LOGIC CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION; POWER CONTROL; SWITCHING THEORY;

GATED LOCKS; MULTIPLE CLOCKING; REGISTER TRANSFER LEVEL CIRCUITS;

SHIFT REGISTERS;

EID: 0029694559     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240582     Document Type: Conference Paper

References (19)