High-isolation bonding pad with depletion-insulation structure for RF/microwave integrated circuits on bulk silicon CMOS

IEEE MTT-S International Microwave Symposium Digest

Volumn 2, Issue , 2002, Pages 677-680

  Lam, Sang ^a   Ki, Wing Hung ^a   Chan, Mansun ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC INDUCTORS; ELECTRIC WIRE; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; SEMICONDUCTING SILICON;

DEPLETION INSULATION STRUCTURE; HIGH ISOLATION BONDING PAD; RADIO FREQUENCY INTEGRATED CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0036318817     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. Integration and electrical isolation in CMOS mixed-signal wireless chips
2. Shielded-based microwave on-wafer device measurements
3. A bond-pad structure for reducing effects of substrate resistance on LNA performance in a silicon bipolar technology
4. Bonding pad models for silicon VLSI technologies and their effects on the noise figure of RF NPNs
5. Digital Integrated Circuits: A Design Perspective
6. On-chip spiral inductors with patterned ground shields for Si-based RF IC's
7. Design of low-capacitance bond pad for high frequency I/O applications in CMOS integrated circuits