Design of low-capacitance bond pad for high-frequency I/O applications in CMOS integrated circuits

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 2000, Pages 293-296

  Ker, Ming Dou ^a   Jiang, Hsin Chin ^a   Chang, Chyh Yih ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; PROCESS CONTROL;

BOND PAD; ELECTROSTATIC DISCHARGE (ESD); HIGH FREQUENCY APPLICATIONS; PARASITIC CAPACITANCE;

CMOS INTEGRATED CIRCUITS;

EID: 0033696592     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)