Ultra low on-resistance SBD with P-buried floating layer

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2002, Pages 33-36

  Saitoh, Wataru ^a   Omura, Ichiro ^a   Tokano, Ken'ichi ^a   Ogura, Tsuneo ^a   Ohashi, Hiromichi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

Buried structure; On resistance; Schottky barrier diode

Indexed keywords

ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; EPITAXIAL GROWTH; MICROPROCESSOR CHIPS; SEMICONDUCTING SILICON;

BURIED LAYER (BL) STRUCTURES; SCANNING CAPACITANCE MICROSCOPES (SCM);

SCHOTTKY BARRIER DIODES;

EID: 0036053239     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. COOLMOS™ - A new milestone in high voltage power MOS
2. A new generation of power unipolar devices: The concept of the floating islands MOS transistor (FLIMOST)
3. A novel high-voltage sustaining structure with buried oppositely doped regions
4. Dielectric charge traps: New structure element for power devices