Low-swing clock domino logic incorporating dual supply and dual threshold voltages

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 467-472

  Jung, Seong Ook ^a   Kim, Ki Wook ^a   Kang, Sung Mo ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Domino logic; Dual supply voltage; Dual threshold voltage; Low power; Low swing clock

Indexed keywords

ALGORITHMS; ELECTRIC DELAY LINES; ELECTRIC POWER SYSTEMS; THRESHOLD VOLTAGE;

DOMINO LOGIC; GATE-TO-SOURCE VOLTAGE CHANGE; LOW SWING CLOCKS;

LOGIC GATES;

EID: 0036048602     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/513918.514036     Document Type: Conference Paper

References (9)

1. On gate level power optimization using dual-supply voltages
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3. A low-power design method using multiple supply voltages
4. Mixed-swing quardrail for low power dual-rail logic logic
5. Low power/low swing domino CMOS logic
6. Alpha-power law mosfet model and its application to CMOS inverter delay and other formulas
7. Design of low-power domino circuits using multiple supply voltages
8. Converter free multiple scaling techniques for low-power CMOS digital design