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Volumn 2, Issue , 2001, Pages 711-714

Design of low-power domino circuits using multiple supply voltages

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARK CIRCUIT; CELL LIBRARY; CELL-BASED; CELL-BASED DESIGN; CMOS CIRCUITS; DOMINO CIRCUIT; DYNAMIC LOGIC CIRCUITS; HIGH SPEED; HIGH-SPEED CIRCUITS; LOW POWER; LOW SWING; MULTIPLE SUPPLY VOLTAGES; OPERATING SPEED; POWER CONSUMPTION; POWER REDUCTIONS; VOLTAGE-SCALING;

EID: 77956799276     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (18)

References (10)
  • 5
    • 0032022688 scopus 로고    scopus 로고
    • Automated low-power technique exploiting multiple supply voltages applied to a media processor
    • K. Usami et al., "Automated low-power technique exploiting multiple supply voltages applied to a media processor", IEEE J. of Solid-State Circuits, Vol. 33, no. 3, 1998, pp.463-472.
    • (1998) IEEE J. of Solid-state Circuits , vol.33 , Issue.3 , pp. 463-472
    • Usami, K.1
  • 6
    • 0031645882 scopus 로고    scopus 로고
    • Design of standard cells used in low-power ASIC's exploiting the multiple-supply-voltage scheme
    • J. S. Wang, S. J. Shieh, J. C. Wang, and C. W. Yeh, "Design of standard cells used in low-power ASIC's exploiting the multiple-supply-voltage scheme", IEEE Int. ASIC conf., 1998, pp. 119-123.
    • (1998) IEEE Int. ASIC Conf. , pp. 119-123
    • Wang, J.S.1    Shieh, S.J.2    Wang, J.C.3    Yeh, C.W.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.