Overlay accuracy in 0.18 micron copper-dual-damascene process

Proceedings of SPIE-The International Society for Optical Engineering

Volumn 4689 I, Issue , 2002, Pages 386-396

  Schulz, Bernd ^a   Levinson, Harry J ^b   Seltmann, Rolf ^a   Seligson, Joel ^c   Izikson, Pavel ^c   Ronen, Anat ^c  

^a IBM MICROELECTRONICS   (United States)

^b ADVANCED MICRO DEVICES   (United States)

^c KLA TENCOR CORPORATION   (United States)

Author keywords

Accuracy; Calibration; Overlay

Indexed keywords

ETCHING; INTEGRATED CIRCUITS; LOGIC GATES; SCANNING ELECTRON MICROSCOPY;

OVERLAY METROLOGY;

LITHOGRAPHY;

EID: 0036028761     PISSN: 0277786X     EISSN: None     Source Type: Journal    
DOI: 10.1117/12.473477     Document Type: Article

References (6)

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3. R. Seltmann, W. Demmerle, M. Staples, A.M. Minivielle, B. Schulz, and S. Muehle, "Overlay budget considerations for an all scanner fab," Proc. SPIE 4000, pp. 896-904, 2000.
4. A. Habermas, B. Ferguson, J. Seligson, E. Kassel, and P. Izikson, "Overlay accuracy-A metal layer study," these proceedings.
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