Opportunities and challenges in ultra low k dielectrics for interconnect applications

Technical Digest-International Electron Devices Meeting

Volumn , Issue , 2001, Pages 529-532

  Purushothaman, S ^a   Nitta, S V ^a   Ryan, J G ^b   Narayan, C ^a   Krishnan, M ^a   Cohen, S ^a   Gates, S ^a   Whitehair, S ^a   Hedrick, J ^a   Tyberg, C ^a   Greco, S ^b   Rodbell, K ^a   Huang, E ^a   Dalton, T ^b   DellaGuardia, R ^b   Saenger, K ^a   Simonyi, E ^a   Chen, S T ^b   Malone, K ^b   Miller, R ^c   Volksen, W ^c   more..

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM RESEARCH   (United States)

^c IBM ALMADEN RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; FRACTURE TOUGHNESS; MORPHOLOGY; PERMITTIVITY; PORE SIZE; POROSITY; POROUS MATERIALS; POSITRON ANNIHILATION SPECTROSCOPY; SCANNING ELECTRON MICROSCOPY; SILICATES; X RAY SCATTERING;

INTERCONNECT APPLICATIONS; POROUS DIELECTRICS; POSITRON ANNIHILATION LIFETIME SPECTROSCOPY; SILICON BACK END OF THE LINE INTERCONNECTS; SMALL ANGLE X RAY SCATTERING;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0035716674     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2001.979561     Document Type: Article

References (14)