Si single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic

Technical Digest-International Electron Devices Meeting

Volumn , Issue , 2001, Pages 151-154

  Kim, Dae Hwan ^a   Sung, Suk Kang ^a   Kim, Kyung Rok ^a   Choi, Bum Ho ^b   Hwang, Sung Woo ^b   Ahn, Doyeol ^b   Lee, Jong Duk ^a   Park, Byung Gook ^a  

^a Seoul National University   (South Korea)

^b University of Seoul   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT OSCILLATIONS; GATES (TRANSISTOR); HIGH TEMPERATURE EFFECTS; LITHOGRAPHY; LOGIC CIRCUITS; SEMICONDUCTING SILICON; SILICON ON INSULATOR TECHNOLOGY; TUNNEL JUNCTIONS;

DYNAMIC SINGLE-ELECTRON TRANSISTOR LOGIC; SIDEWALL DEPLETION GATES; SILICON SINGLE-ELECTRON TRANSISTORS; SILICON-ON-INSULATOR NANOWIRE;

TRANSISTORS;

EID: 0035716655     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2001.979454     Document Type: Article

References (10)

1. A new design scheme for logic circuits with single electron transistors
2. Room-temperature operation of multifunctional single-electron transistor logic
3. Gate controlled Coulomb blockade effects in the conduction of a silicon quantum wire
4. Quantum mechanical effects in the silicon quantum dot in a single-electron transistor
5. Room temperature silicon single-electron quantum-dot transistor switch
6. Single-electron transistors based on silicon-on-insulator wire patterned by sidewall masking technology and electrically induced tunnel barriers
7. Room temperature operation of a single-electron switch with an electrically formed quantum dot
8. Voltage gain in GaAs-based lateral single-electron transistors having schottky wrap gates
9. Size dependence of the characteristics of Si single-electron transistors on SIMOX substrates