A novel SCR macromodel for ESD circuit simulation

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 319-322

  Juliano, Patrick A ^a   Rosenbaum, Elyse ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC DISCHARGES; ELECTRIC NETWORK ANALYSIS; ELECTROSTATICS; EQUIVALENT CIRCUITS; SEMICONDUCTOR DEVICE STRUCTURES; THYRISTORS; TRANSIENTS;

ELECTROSTATIC DISCHARGE CIRCUIT SIMULATION; ELECTROSTATIC DISCHARGE STRESS TRANSIENTS; LOW VOLTAGE TRIGGERING SILICON CONTROLLED RECTIFIER; SILICON CONTROLLED RECTIFIER MACROMODEL;

SEMICONDUCTOR DEVICE MODELS;

EID: 0035714820     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. Advanced CMOS protection device trigger mechanisms during CDM
2. A simulation analysis of quarter-micron CMOS LSI input circuit behavior under CDM-ESD for protection device improvement
3. Computation of steady-state CMOS latchup characteristics
4. Transmission line pulsing techniques for circuit modeling of ESD phenomena
5. Very fast transmission line pulsing of integrated structures and the charged device model
6. Accurate wafer-level measurement of ESD protection device turn-on using very fast transmission line pulse testing
7. Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions
8. Circuit-level electrothermal simulation of electrical overstress failures in advanced mos I/O protection devices
9. ESD design for IC chip quality and reliability