Simulation analysis of quarter-micron CMOS LSI input circuit behavior under CDM-ESD for protection device improvement

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn , Issue , 1999, Pages 116-123

  Narita, Kaoru ^a   Horiguchi, Yoko ^a   Hayano, Kiminori ^a   Suzuki, Kouichi ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC DISCHARGES; ELECTRIC RECTIFIERS; ELECTROSTATICS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES;

CHARGED DEVICE MODEL (CDM); ELECTROSTATIC DISCHARGES (ESD); INPUT CIRCUITS;

LSI CIRCUITS;

EID: 0033279193     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)