An approach to measuring power supply impedance of microprocessors

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn , Issue , 2001, Pages 211-214

  Taylor, Greg ^a   Deutschle, Craig ^a   Arabi, Tawfik ^a   Owens, Brian ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC IMPEDANCE MEASUREMENT; ELECTRIC POWER SUPPLIES TO APPARATUS; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; NUMERICAL ANALYSIS; VOLTAGE REGULATORS;

CLOCK RATE; POWER SUPPLY IMPEDANCE; VOLTAGE REGULATOR MODULE;

CMOS INTEGRATED CIRCUITS;

EID: 0035701745     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. An on-chip voltage regulator using switched decoupling capacitors
2. Power distribution system design methodology and capacitor selection for modern CMOS technology
3. Reliability and performance tradeoffs in the design of on-chip power delivery and interconnects
4. Modeling and transient simulation of planes in electronic packages for GHz systems
5. A methodology for the placement and optimization of decoupling capacitors for gigahertz systems