Reliability and performance tradeoffs in the design of on-chip power delivery and interconnects

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn , Issue , 1999, Pages 49-52

  Taylor, Gregory F ^a   Arabi, Tawfik ^a   Greub, Hans ^a   Muyshondt, Richard ^a   Manthe, Alicia ^a   Aminzadeh, Payman ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CURRENT DENSITY; ELECTRIC POTENTIAL; ELECTROMIGRATION; HOT CARRIERS; INTEGRATED CIRCUIT LAYOUT; OXIDES; RELIABILITY;

SIGNAL INTEGRITY VERIFICATION;

MICROPROCESSOR CHIPS;

EID: 0033337877     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (2)