Trap energetic and spatial localization in buried-gate 6H-SiC JFETs by means of numerical device simulation

IEEE Electron Device Letters

Volumn 22, Issue 12, 2001, Pages 579-581

  Verzellesi, G ^a,b,c   Meneghesso, G ^a,c,d   Cavallini, A ^c,e   Zanoni, E ^a,c,d  

^a IEEE   (Italy)

^b UNIVERSITY OF MODENA AND REGGIO EMILIA   (Italy)

^c INFM   (Italy)

^d UNIVERSITY OF PADOVA   (Italy)

^e UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

2 D simulations; DLTS; JFET; SiC

Indexed keywords

DRAIN CURRENT TRANSIENTS;

ACTIVATION ENERGY; CARRIER CONCENTRATION; COMPUTER SIMULATION; DEEP LEVEL TRANSIENT SPECTROSCOPY; ELECTRON TRAPS; HOLE TRAPS; SEMICONDUCTOR JUNCTIONS; SILICON CARBIDE;

JUNCTION GATE FIELD EFFECT TRANSISTORS;

EID: 0035697024     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.974583     Document Type: Article

References (9)

1. Trends in power semiconductor devices
2. Silicon carbide high-power devices
3. Investigation of defects in epitaxial 3C-SiC, 4H-SiC and 6H-SiC films grown on SiC substrates
4. Breakdown and low-temperature anomalous effects in 6H SiC JEFT's
5. Trap characterization in buried-gate N-channel 6H-SiC JEFT's
6. SiC devices: Physics and numerical simulation
7. Electrical and optical characterization of SiC
8. Experimental characterization and numerical simulation of the electrical properties of nitrogen, alluminium, and boron in 4H/6H-SiC