Test and repair of large embedded DRAMs: Part 1

IEEE International Test Conference (TC)

Volumn , Issue , 2001, Pages 163-172

  McConnell, Roderick ^a   Rajsuman, Rochit ^a   Nelson, Erik ^a   Dreibelbis, Jeffrey ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; CMOS INTEGRATED CIRCUITS; ECONOMICS; EMBEDDED SYSTEMS; INTEGRATED CIRCUIT TESTING; PROM; SEMICONDUCTOR STORAGE; STATIC RANDOM ACCESS STORAGE;

EMBEDDED MEMORIES; SYSTEM INTEGRATION ON-CHIP;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0035687653     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

1. An ASIC library granular DRAM macro with built-in self test
2. A microcontroller with embedded DRAM and test features
3. A built-in self-repair analyzer (CRESTA) for embedded DRAMs
4. How we test Siemens embedded DRAM cores
5. The embedded DRAM test dilemma
6. Design and test of large embedded memories: An overview
7. Strategies for minimizing cost for testing system-on-a-chip