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Volumn 1, Issue , 2001, Pages 462-465

High performance reconfigurable computing systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER PROGRAMMING; COMPUTER PROGRAMMING LANGUAGES; COMPUTER SIMULATION; COMPUTER SOFTWARE; INTERCONNECTION NETWORKS; ITERATIVE METHODS; MATHEMATICAL MODELS; SYNCHRONIZATION;

EID: 0035574026     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/MWSCAS.2001.986212     Document Type: Article
Times cited : (5)

References (20)
  • 1
    • 85013253855 scopus 로고    scopus 로고
    • BLAS: Basic Library of Algebraic Subroutines
    • (2001)
  • 2
    • 85013346978 scopus 로고    scopus 로고
    • DARPA TTO Adaptive Computing Systems
    • (2001)
  • 3
    • 85013284107 scopus 로고    scopus 로고
    • Vector Signal Image Processing Library (VSIPL)
    • (2001)
  • 4
    • 85013346976 scopus 로고    scopus 로고
  • 5
    • 85013271009 scopus 로고    scopus 로고
  • 11
    • 0003694702 scopus 로고    scopus 로고
    • A systematic implementation of image processing algorithms on configurable computing hardware
    • Master of Science Electrical Engineering, The University of Tennessee
    • (1999)
    • Levine, B.1
  • 13
    • 0004025225 scopus 로고    scopus 로고
    • Development and verification of library cells for reconfigurable logic
    • Master of Science Electrical Engineering, The University of Tennessee
    • (1999)
    • Natarajan, S.1
  • 16
    • 0004048990 scopus 로고    scopus 로고
    • Scheduling task chains on an array of reconfigurable FPGAs
    • Master of Science University of Tennessee
    • (1999)
    • Shetters, C.W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.