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Volumn 4525, Issue 1, 2001, Pages 60-68

Programming high performance reconfigurable computers

Author keywords

High performance computing; Performance evaluation; Programming; Reconfigurable computing

Indexed keywords

COMPUTER PROGRAMMING; DISTRIBUTED COMPUTER SYSTEMS; INTERFACES (COMPUTER); MARKETING; OPTIMIZATION; PROGRAM PROCESSORS;

EID: 0035189874     PISSN: 0277786X     EISSN: None     Source Type: Journal    
DOI: 10.1117/12.434385     Document Type: Article
Times cited : (2)

References (29)
  • 1
    • 84994425964 scopus 로고    scopus 로고
    • BLAS: Basic Library of Algebraic Subroutines
    • (2001)
  • 2
    • 84994443355 scopus 로고    scopus 로고
    • DARPA Adaptive Computing Systems
    • (2001)
  • 3
    • 84994408596 scopus 로고    scopus 로고
    • Vector Signal Image Processing Library (VSIPL)
    • (2001)
  • 4
    • 84994419123 scopus 로고    scopus 로고
  • 5
    • 84994408595 scopus 로고    scopus 로고
  • 10
    • 0006728388 scopus 로고    scopus 로고
    • Configurable computing: A survey of systems and software
    • Northwestern University, Dept. of ECE Technical Report; Northwestern University
    • (1999)
    • Compton, K.1    Hauck, S.2
  • 16
    • 4243933335 scopus 로고    scopus 로고
    • Java hardware description language
    • JHDL
  • 17
    • 0003694702 scopus 로고    scopus 로고
    • A systematic implementation of image processing algorithms on configurable computing hardware
    • Master of Science Electrical Engineering, The University of Tennessee
    • (1999)
    • Levine, B.1
  • 20
    • 0004025225 scopus 로고    scopus 로고
    • Development and verification of library cells for reconfigurable logic
    • Master of Science Electrical Engineering, The University of Tennessee
    • (1999)
    • Natarajan, S.1
  • 24
    • 0004048990 scopus 로고    scopus 로고
    • Scheduling task chains on an array of reconfigurable FPGAs
    • Master of Science University of Tennessee
    • (1999)
    • Shetters, C.W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.