Characterization of polysilicon resistors in sub-0.25 μm CMOS ULSI applications

IEEE Electron Device Letters

Volumn 22, Issue 7, 2001, Pages 318-320

  Liu, Wen Chau ^a,b   Thei, Kong Beng ^b   Chuang, Hung Ming ^b   Lin, Kun Wei ^b   Cheng, Chin Chuan ^b   Ho, Yen Shin ^c   Su, Chi Wen ^c   Wong, Shyh Chyi ^c   Lin, Chih Hsien ^c   Diaz, Carlos H ^c  

^a IEEE   (Taiwan)

^b NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^c TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

CMOS; Polysilicon resistors; Salicide

Indexed keywords

CHEMICAL MECHANICAL POLISHING; ELECTRIC RESISTANCE; ETCHING; HETEROJUNCTIONS; INTEGRATED CIRCUIT MANUFACTURE; ION IMPLANTATION; MATHEMATICAL MODELS; METALLIZING; POLYSILICON; RAPID THERMAL ANNEALING; RESISTORS; ULSI CIRCUITS;

CMOS ULSI; POLYSILICON RESISTORS; SALICIDE;

CMOS INTEGRATED CIRCUITS;

EID: 0035397706     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.930677     Document Type: Article

References (17)

1. A high-performance 0.25-μm CMOS technology: II-Technology
2. Low-temperature (≤550 °C) fabrication of poly-Si thin-film transistors
3. High performance 0.1 μm CMOS devices with 1.5 V power supply
4. Silicon MOS transconductance scaling into the overshoot regime
5. Electrical properties of heavily doped polycrystalline silicon-germanium films
6. 2 salicide technology for 0.1μm processes and below
7. Temperature dependence of gate and substrate currents in the CHE crossover regime
8. Test structure to investigate the series resistance components of source/drain structure
9. A new and improved borderless contact (BLC) structure for high-performance Ti-salicide in sub-quarter micron CMOS devices
10. CMOS with active well bias for low-power and RF/analog application
11. Electrical trimming of poly-crystalline silicon resistors and its application to analog ICs
12. The design of thin-film polysilicon resistors for analog IC applications
13. Dual-type CMOS gate electrodes by dopant diffusion from silicide
14. Fabrication technology of polysilicon resistors using novel mixed process for analogue CMOS applications
15. Measurement of lateral dopant diffusion in thin film silicide layers
16. Titanium silicide/silicon nonohmic contact resistance for NFETs, PFETs, diffused resisor, and NPNs in a BiCMOS technology