Fabrication technology of polysilicon resistors using novel mixed process for analogue CMOS applications

Electronics Letters

Volumn 35, Issue 7, 1999, Pages 603-604

  Lee, D W ^a   Roh, T M ^a   Park, H S ^b   Kim, J ^a   Koo, J G ^a   Kim, D Y ^a  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

^b Uiduk University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LOW TEMPERATURE PROPERTIES; PHOSPHORUS; SEMICONDUCTING FILMS; SEMICONDUCTOR DOPING;

PHOSPHORUS-DOPED POLYSILICON FILMS; POLYSILICON RESISTORS;

RESISTORS;

EID: 0032659836     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990313     Document Type: Article

References (4)

1. 2-implanted base with rapid thermal process', IEEE Trans., 1993, ED-40, pp. 1484-1495
2. LAES, E., CASIER, H.J., SCHUTZ, E., and ALCATEL, M.: 'Analog-digital technologies for mixed-signal processing', IEEE Micro., 1992, pp. 34-42
3. MANDURAH, M.M., SARASWAT, K.C., HELMS, C.R., and KAMINS, T.I.: 'Dopant segregation in polycrystalline silicon', J. Appl. Phys., 1980, 51, (11), pp. 5755-5763
4. LU, N.C.C., GERZBERG, L., and MEINDL, J.D.: 'Scaling limitations of monolithic polycrystalline-silicon resistors in VLSI static RAM's and logic', IEEE Trans., 1982, ED-29, pp. 682-690