Statistical modeling of 3-D parallel-plate embedded capacitors using Monte Carlo simulation

ETRI Journal

Volumn 23, Issue 1, 2001, Pages 23-32

  Yun, Llgu ^a   Poddar, Ravi ^b   Carastro, Lawrence ^c   Brooke, Martin ^c   May, Gary S ^c  

^a Yonsei University   (South Korea)

^b Integrated Device Technologies   (United States)

^c GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MONTE CARLO METHODS; MULTICHIP MODULES; OPTIMIZATION;

LOW TEMPERATURE COFIRED CERAMIC; PARALLEL PLATE CAPACITOR;

CAPACITORS;

EID: 0035281445     PISSN: 12256463     EISSN: None     Source Type: Journal    
DOI: 10.4218/etrij.01.0101.0104     Document Type: Article

References (14)

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6. Extraction of passive device model parameters using genetic algorithms
7. Equivalent circuit models for three dimensional multiconductor systems
8. Three-dimensional interconnect analysis using partial element equivalent circuits
9. Accurate high speed empirically based predictive modeling of deeply embedded gridded parallel plate capacitors fabricated in a multilayer LTCC process
10. Circuit models for three-dimensional geometries including dielectrics
11. An algorithm for least-squares estimation of nonlinear parameters
12. RF amplifier design program