Code reordering and speculation support for dynamic optimization systems

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2001, Pages 163-174

  Nystrom, E M ^a   Barnes, R D ^a   Merten, M C ^a   Hwu, W M W ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; MICROPROCESSOR CHIPS; OPTIMIZATION; SCHEDULING;

PRECISE SPECULATION; RUN-TIME OPTIMIZATION ARCHITECTURE (ROAR);

DATA FLOW ANALYSIS;

EID: 0035177608     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (24)

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