Clock and data recovery IC for 40 Gb/s fiber-optic receiver

Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Volumn , Issue , 2001, Pages 93-96

  Georgiou, G ^a   Baeyens, Y ^a   Chen, Y K ^a   Groepper, C ^a   Paschke, P ^a   Pullela, R ^a   Reinhold, M ^a   Dorschky, C ^a   Mattia, J P ^a   Von Mohrenfels, T W ^a   Schulien, C ^a  

^a LUCENT TECHNOLOGIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; HETEROJUNCTION BIPOLAR TRANSISTORS; INTEGRATED CIRCUITS; OPTICAL COMMUNICATION; PHASE LOCKED LOOPS; SIGNAL RECEIVERS;

CLOCK DATA RECOVERY (CDR);

FIBER OPTICS;

EID: 0035175767     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Packaged clock recovery integrated circuits for 40 Gb/s optical communication links
2. A 40 Gb/s integrated clock and data recovery circuit in a 50 GHz ft silicon bipolar technology
3. A plastic packaged 10Gb/s BiCMOS clock and data recovering 1:4 demultiplexer with external VCO
4. A fully-integrated 40Gb/s Clock and data recovery / 1:4 DEMUX IC in SiGe technology
5. Clock recovery from random binary signals
6. A low power 52.9 GHz static divider implemented in a manufacturable 180 GHz InAlAs/InGaAs HBT IC technology