Implementation of 2D-DCT on XC4000 series FPGA using DFT-based DSFG and DA architectures

IEEE International Conference on Image Processing

Volumn 3, Issue , 2001, Pages 302-305

  Kiryukhin, G ^a   Celenk, M ^a  

^a Ohio University   (United States)

Author keywords

2D DCT; Distributed arithmetic; Flo graph architecture; FPGA implementation

Indexed keywords

COMPUTER ARCHITECTURE; COSINE TRANSFORMS; DIGITAL ARITHMETIC; FOURIER TRANSFORMS; ONE DIMENSIONAL; TWO DIMENSIONAL;

COMBINATIONAL LOGIC BLOCKS; DISCRETE COSINE TRANSFORM; DISTRIBUTED ARITHMETIC;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0035167626     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

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