On-chip ESD protection circuit with low trigger voltage in BiCMOS technology

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 1, 2001, Pages 40-45

  Wang, Albert Z H ^a   Tsay, Chen Hui ^b  

^a Illinois Institute of Technology   (United States)

^b NATIONAL SEMICONDUCTOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC DISCHARGES; ELECTROSTATICS; INTEGRATED CIRCUIT LAYOUT; TRANSISTORS; TRIGGER CIRCUITS;

ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUITS; TRIGGER VOLTAGE;

CMOS INTEGRATED CIRCUITS;

EID: 0035118440     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.896227     Document Type: Article

References (9)

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