-
1
-
-
0002379498
-
Oversampling methods for A/D and D/A conversion
-
New York: IEEE Press
-
J. C. Candy, and G. C. Temes, "Oversampling methods for A/D and D/A conversion", in Oversampling Delta-Sigma Data Converter. New York: IEEE Press, 1992, pp. 1-25.
-
(1992)
Oversampling Delta-sigma Data Converter
, pp. 1-25
-
-
Candy, J.C.1
Temes, G.C.2
-
3
-
-
0026400093
-
A 50-MHz multibit sigmadelta modulator for 12-b 2-MHz A/D conversion
-
Dec.
-
B. P. Brant, and B. A. Wooley, "A 50-MHz multibit sigmadelta modulator for 12-b 2-MHz A/D conversion", IEEE J. Solid-State Circuits, vol. 26, pp. 1746-1756, Dec. 1991.
-
(1991)
IEEE J. Solid-state Circuits
, vol.26
, pp. 1746-1756
-
-
Brant, B.P.1
Wooley, B.A.2
-
4
-
-
0029521438
-
A CMOS analog front-end circuit for an FDM-based ADSL system
-
Dec.
-
Z.-Y. Chang, D. Macq, D. Haspeslagh, P. Spruyt, and B. Goffart, "A CMOS analog front-end circuit for an FDM-based ADSL system", IEEE J. Solid-State Circuits, vol. 30, pp. 1449-1456, Dec. 1995.
-
(1995)
IEEE J. Solid-state Circuits
, vol.30
, pp. 1449-1456
-
-
Chang, Z.-Y.1
Macq, D.2
Haspeslagh, D.3
Spruyt, P.4
Goffart, B.5
-
5
-
-
0031333312
-
A cascaded sigma-delta pipeline converter with 1.25 MHz signal bandwidth and 89 dB SNR
-
Dec.
-
T. L. Brooks, D. H. Robertson, D. F. Kelly, A. Del Muro, and S. W. Harton, "A cascaded sigma-delta pipeline converter with 1.25 MHz signal bandwidth and 89 dB SNR", IEEE J. Solid-State Circuits, vol. 32, pp. 1896-1906, Dec. 1997.
-
(1997)
IEEE J. Solid-state Circuits
, vol.32
, pp. 1896-1906
-
-
Brooks, T.L.1
Robertson, D.H.2
Kelly, D.F.3
Del Muro, A.4
Harton, S.W.5
-
6
-
-
0032187834
-
A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channel applications
-
PII S0018920098069844
-
A. R. Feldman, B. E. Boser, and P. R. Gray, "A 13-b 1.4 MS/s sigma-delta modulator for RF baseband channel applications", IEEE J. Solid-State Circuits, vol. 33, pp. 1462-1469, Oct. 1998. (Pubitemid 128588598)
-
(1998)
IEEE Journal of Solid-State Circuits
, vol.33
, Issue.10
, pp. 1462-1469
-
-
Feldman, A.R.1
Boser, B.E.2
Gray, P.R.3
-
7
-
-
0344771175
-
A 13-bit 2.2-MS/s, 55-mW multibit cascade IA modulator in CMOS 0.7-um single-poly technology
-
Jun.
-
F. Medeiro, B. Perez-Verdii, and A. Rodriguez-Vazquez, "A 13-bit 2.2-MS/s, 55-mW multibit cascade IA modulator in CMOS 0.7-um single-poly technology", IEEE J. Solid-State Circuits, vol. 34, pp. 748-760, Jun. 1999.
-
(1999)
IEEE J. Solid-state Circuits
, vol.34
, pp. 748-760
-
-
Medeiro, F.1
Perez-Verdii, B.2
Rodriguez-Vazquez, A.3
-
8
-
-
0034225391
-
14-bit 2.2-MS/s, sigma-delta ADC's
-
Jul.
-
J. C. Morizio, M. Hoke, T. Kocak, C. Geddie, C. Hughes, J. Perry, S. Madhavapeddi, M. H. Hood, G. Lynch, H. Kondoh, T. Kumamoto, T. Okuda, H. Noda, M. Ishiwaki, T. Miki, and M. Nakaya, "14-bit 2.2-MS/s, sigma-delta ADC's", IEEE J. Solid-State Circuits, vol. 35, pp. 968-976, Jul. 2000.
-
(2000)
IEEE J. Solid-state Circuits
, vol.35
, pp. 968-976
-
-
Morizio, J.C.1
Hoke, M.2
Kocak, T.3
Geddie, C.4
Hughes, C.5
Perry, J.6
Madhavapeddi, S.7
Hood, M.H.8
Lynch, G.9
Kondoh, H.10
Kumamoto, T.11
Okuda, T.12
Noda, H.13
Ishiwaki, M.14
Miki, T.15
Nakaya, M.16
-
11
-
-
0033734146
-
New class of multibit sigma-delta modulators using multirate architecture
-
April
-
F. Colodro, A. Torralba, F. Mufioz, and L. G. Franquelo. "New class of multibit sigma-delta modulators using multirate architecture", Electron. Letters, vol. 36, pp. 783-785, April 2000.
-
(2000)
Electron. Letters
, vol.36
, pp. 783-785
-
-
Colodro, F.1
Torralba, A.2
Mufioz, F.3
Franquelo, L.G.4
-
12
-
-
0001058202
-
A multistage delta-sigma modulator without double integration loop
-
Feb.
-
T. Hayashi, Y. Inabe, K. Uchimura, and A. Iwata, "A multistage delta-sigma modulator without double integration loop", in ISSCC Dig. Tech. Pap., pp. 182-183, Feb. 1986.
-
(1986)
ISSCC Dig. Tech. Pap.
, pp. 182-183
-
-
Hayashi, T.1
Inabe, Y.2
Uchimura, K.3
Iwata, A.4
|