메뉴 건너뛰기




Volumn 28, Issue 3, 2001, Pages 151-163

A programmable parallel VLSI architecture for 2-D discrete wavelet transform

Author keywords

DSP architecture; JPEG 2000; Wavelet

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; IMAGE COMPRESSION; PARALLEL PROCESSING SYSTEMS; STANDARDS; TWO DIMENSIONAL; VLSI CIRCUITS; WAVELET TRANSFORMS;

EID: 0034952692     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1011180506997     Document Type: Article
Times cited : (10)

References (12)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.