A VLSI Architecture for Separable 2-D Discrete Wavelet Transform

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 18, Issue 2, 1998, Pages 125-140

  Limqueco, Jimmy C ^a,b   Bayoumi, Magdy A ^{a,c,d,e,f,g,h,i,j,k,l,m}  

^a UNIVERSITY OF LOUISIANA AT LAFAYETTE   (United States)

^b DE LA SALLE UNIVERSITY   (Philippines)

^c CAIRO UNIVERSITY   (Egypt)

^d WASHINGTON UNIVERSITY   (United States)

^e UNIVERSITY OF WINDSOR   (Canada)

^f VLSI Syst and Applic Tech Comm

^g Neural Network TC

^h Multimedia Technical Committee

ⁱ ISCAS

^j ISCAS ^*

^k ASSP Tech Comm on VLSI Processing

^l CS Tech Committee on VLSI Design

^m IEEE

more..

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL LOGIC; DISCRETE WAVELET TRANSFORM (DWT); MULTIPLY-ACCUMULATE (MAC) UNIT; SEMI-SYSTOTIC ARRAYS;

COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; DATA TRANSFER; FORMAL LOGIC; WAVELET TRANSFORMS; PROGRAM PROCESSORS; SIGNAL PROCESSING;

VLSI CIRCUITS; COMPUTER ARCHITECTURE;

CONTROL LOGIC; DISCRETE WAVELET TRANSFORM; SEMI SYSTOLIC ARRAY;

EID: 0031997663     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (21)

1. S. Livens, P. Scheunders, G.V. de Wouver, and D.V. Dyck, "Wavelets for texture analysis," Tech. report, VisielLab, Department of Physics, University of Antwerp, Groenenborgerlaan 171, 2020 Antwerpen, Belgium.
2. H.T. Kung, "Why systolic architectures?," Computer, pp. 37-46, Jan. 1982.
3. S.B. Syed, M.A. Bayoumi, and J. Limqueco, "An integrated discrete wavelet transform array architecture," Proc. of Computer Architecture for Machine Perception, pp. 44-50, Sept. 1995.
4. J. Chen and M.A. Bayoumi, "A scalable systolic architecture for discrete wavelet transform," Proc. of IEEE Workshop on VLSI Signal Processing, Vol. III, pp. 303-312, Nov. 1995.
5. J. Fridman and E.S. Manolakos, "Distributed memory and control VLSI architectures for the 1-D discrete wavelet transform," IEEE VLSI Signal Processing, 1994.
6. M. Vishwanath, "The recursive pyramid algorithm for the discrete wavelete transforms," IEEE Trans. on Signal Processing, Vol. 42, pp. 673-676, March 1994.
7. K.K. Parhi and T. Nishitani, "VLSI architectures for discrete wavelete transforms," IEEE Trans, on VLSI Systems, Vol. 1, No. 2, pp. 191-202, June 1993.
8. M. Vishwanath, R.M. Owens, and M.J. Irwin, "VLSI architectures for the discrete wavelet transform,IEEE Trans, on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 42, No. 5, May 1995.
9. C. Charkrabarti, M. Vishwanath, and R.M. Owens, "Architectures for wavelet transforms: A survey," Journal of VLSI Signal Processing, Vol. 14, pp. 171-192, 1996.
10. J.C. Limqueco and M.A. Bayoumi, "A scalable architecture for 2-D discrete wavelet transform," VLSI Signal Processing, Vol. IX, pp. 369-377, Oct. 1996.
11. J.C. Limqueco and M.A. Bayoumi, "A high speed array architecture for wavelet transform," Proceedings of 1996 Midwest Symposium on Circuits and Systems, pp. 1239-1243, Aug. 1996.
12. S. Mallat, "Multifrequency channel decompositions of images and wavelet models," IEEE Trans. Acoustics Speech and Signal Processing, pp. 2091-2110, Dec. 1989.
13. S. Mallat, "A theory for multiresolution signal decompositions: The wavelet representation," IEEE Trans. Pattern Analysis and Mach. Intelligence, pp. 674-693, July 1989.
14. G. Knowles, "VLSI architecture for the discrete wavelet transform," Electronics Letter, Vol. 26, No. 15, pp. 1184-1185, July 1990.
15. A.S. Lewis and G. Knowles, "VLSI architecture for 2-D daubechies wavelet transform without multipliers," Electronics Letter, Vol. 27, No. 2, pp. 171-173, Jan. 1991.
16. A. Inc., "Aware wavelet transform processor (WTP) preliminary," Tech. report, Cambridge, MA, 1991.
17. R. Lang, A. Spray, and A. Somani, "Performance/area tradeoffs in tree-based VLSI architectures for the two-dimensional wavelet transform," SPIE, Vol. 2762, pp. 621-631, 1996.
18. C. Chakrabarti and M. Vishwanath, "Efficient realizations of the discrete and continuous wavelet tansforms: From single chip implementations to mappings on SIMD array computers," IEEE Trans, on Signal Processing, Vol. 43, No. 3, pp. 759-771, March 1995.
19. J.N. Patel, L.H. Jamieson, and A.A. Khokhar, "Scalability of 2-d wavelet transform algorithms: Analytical and experimental results on coarse-grained parallel computers," VLSI Signal Processing, Vol. 9, pp. 378-387, Aug. 1996.
20. M. Vetterli and J. Kovacevic, Wavelets and Subband Coding, Prentice Hall, 1995.
21. T. Edwards, "Discrete wavelet transforms: Theory and implementation," Tech. report, Stanford University, June 4, 1992.