Stress engineered metal interconnects

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 4428, Issue , 2001, Pages 195-200

  Fork, D K ^a   Chua, C ^a   Wong, L ^a   Alimonda, A S ^a   Smith, D L ^a   Modi, M ^a   Zhu, Q ^a   Ma, L ^a   Sitaraman, S ^a  

^a PALO ALTO RESEARCH CENTER   (United States)

Author keywords

Interconnects; Packaging; Probing; Sputtering; Stress; Thin film

Indexed keywords

BONDING; FATIGUE OF MATERIALS; FLIP CHIP DEVICES; INTEGRATED CIRCUIT MANUFACTURE; SILICON WAFERS; STRESSES; THIN FILM CIRCUITS;

BONDING PAD DENSITIES; SOLDER FREE SOLUTION; THERMAL FATIGUE;

ELECTRONICS PACKAGING;

EID: 0034837202     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Internal stresses in Cr, Mo, Ta, and Pt films deposited by sputtering from a planar magnetron source
2. A new flipchip technology for high-density packaging
3. High density optoelectronic interconnect using micro-machined spring arrays
4. Flip-chip bonding on 6-um pitch using thin film microspring technology