Current status of FET-type ferroelectric memories

IEEE International Symposium on Applications of Ferroelectrics

Volumn 1, Issue , 2000, Pages 331-336

  Ishiwara, Hiroshi ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC PROPERTIES; FIELD EFFECT TRANSISTORS; NEURAL NETWORKS; RANDOM ACCESS STORAGE; SEMICONDUCTOR DEVICE STRUCTURES; SILICON ON INSULATOR TECHNOLOGY;

FERROELECTRIC RANDOM ACCESS MEMORY; FERROELECTRIC SEMICONDUCTOR INTERFACES; PACKING DENSITY;

FERROELECTRIC MATERIALS;

EID: 0034473537     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. Proposal of a single-transistor-cell-type ferroelectric memory using an SOI structure and experimental study on the interference problem in the write operation
2. Neuron MOS binary-logic integrated circuits - Part 1; design fundamentals and soft-hardware-logic circuit implementation
3. The ferroelectric memory technologies and its applications
4. Proposal of adaptive-learning neuron circuits with ferroelectric analog-memory weights
5. 9-gate FET's and CMOS Schimitt-trigger oscillators
6. Recent progress of FET-type ferroelectric memories
7. 2/Si structure-field effect transistor as a synapse device
8. 12 thin films by MOCVD method and electrical properties of metal/ferroelectric/insulator semiconductor structure
9. 6/SiON buffer layer
10. 7 thin film
11. 3 thin films on Si(111) substrates by molecular beam epitaxy