UltraSPARC-III: A 3rd generation 64b SPARC microprocessor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 410-411

  Lauterbach, G ^a   Greenley, D ^a   Ahmed, S ^a   Boffey, M ^a   Chamdani, J ^a   Chang, S E ^a   Chen, D ^a   Fang, Y ^a   Holdbrook, K ^a   Hsieh, M ^a   Keish, B ^a   Melanson, R ^a   Narasimhaiah, C ^a   Petolino, J ^a   Pham, T ^a   Quach, L ^a   Tam, K ^a   Tong, D ^a   Yang, L ^a   Yau, K ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CACHE MEMORY; COMPUTER ARCHITECTURE; COMPUTER WORKSTATIONS; LOGIC GATES; PROGRAM COMPILERS; SERVERS; TRANSISTORS;

CONTROL TRANSFER INSTRUCTION (CTI);

MICROPROCESSOR CHIPS;

EID: 0034428337     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. UltraSPARC-III: Designing third-generation 64b performance
2. Implementation of a 3rd-generation SPARC V9 64b microprocessor
3. UltraSPARC: The Next generation superscalar 64-bit SPARC
4. A 64b microprocessor with multimedia support
5. A 330MHz 4-way superscalar microprocessor
6. Improving branch prediction accuracy using branch correlation
7. 64-Kbyte sum-addressed-memory cache with 1.6-ns cycle and 2.6-ns latency