New path history management circuits for Viterbi decoders

IEEE Transactions on Communications

Volumn 48, Issue 10, 2000, Pages 1605-1608

  Lin, Ming Bo ^a  

^a NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; CONVOLUTIONAL CODES; DECODING; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; SHIFT REGISTERS; TRELLIS CODES;

PATH HISTORY MANAGEMENT CIRCUIT; PERMUTATION NETWORKS PATH HISTORY; REGISTER EXCHANGE METHOD; TRACE BACK TECHNIQUE; TRELLIS DIAGRAM; VITERBI ALGORITHM; VITERBI DECODERS;

COMBINATORIAL CIRCUITS;

EID: 0034292032     PISSN: 00906778     EISSN: None     Source Type: Journal    
DOI: 10.1109/26.871381     Document Type: Article

References (9)

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