Low-power viterbi decoder for CDMA mobile terminals

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 3, 1998, Pages 473-481

  Kang, Inyup ^a,b,c   Willson Jr , Alan N ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c QUALCOMM INC   (United States)

Author keywords

CDMA digital cellular; CMOS integrated circuit design; Forward error correction (FEC); Low power integrated circuits; Mobile handset; Mobile terminal; PCS (personal communications services); Viterbi algorithm; Viterbi decoder; VLSI for digital communications

Indexed keywords

ALGORITHMS; CELLULAR TELEPHONE SYSTEMS; CMOS INTEGRATED CIRCUITS; DIGITAL COMMUNICATION SYSTEMS; ERROR CORRECTION; INTEGRATED CIRCUIT LAYOUT; PERSONAL COMMUNICATION SYSTEMS; TELEPHONE SETS;

CODE DIVISION MULTIPLE ACCESS (CDMA) SYSTEMS; FORWARD ERROR CORRECTION (FEC); VITERBI ALGORITHMS; VITERBI DECODERS;

VLSI CIRCUITS;

EID: 0032022689     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.661213     Document Type: Article

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