SPICE simulation and tradeoffs of CMOS LNA performance with source-degeneration inductor

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 1, 2000, Pages 62-65

  Tsui, Hau Yiu ^a   Lau, Jack ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; COMPUTER SOFTWARE; ELECTRIC INDUCTORS; ELECTRIC RESISTANCE; IMPEDANCE MATCHING (ELECTRIC); MATHEMATICAL MODELS; SPURIOUS SIGNAL NOISE;

LOW NOISE AMPLIFIERS (LNA); SOFTWARE PACKAGE SPICE;

AMPLIFIERS (ELECTRONIC);

EID: 0033909086     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.818895     Document Type: Article

References (5)

1. D. K. Shaeffer and T. H. Lee, "A 1.5 V, 1.5 GHz CMOS low noise amplifier," IEEE J. Solid State Circuits, pp. 745-759, May 1997.
2. M. Chan, K. Y. Hui, C. Hu, and P. K. Ko, "A robust and physical BSIM3 nonquasistatic transient and AC small-signal model for circuit simulation," IEEE Trans. Electron Devices, vol. 45, pp. 834-841, Apr. 1998.
3. J.-J. Ou, X. Jin, I. Ma, C. Hu, and P. R. Gray, "CMOS RF modeling for GHz Communication IC's," in Symp. VLSI Technologies, Dig. Tech. Papers, 1998.
4. M. Saito, M. Ono, R. Fujimoto, H. Tanimoto, N. Ito, T. Yoshitomi, T. Ohguro, H. S. Momose, and H. Iwaii, "0.15 (Im RF CMOS technology compatible with logic CMOS for low-voltage operation," IEEE Trans. Electron Devices, vol. 45, pp. 737-742, Mar. 1998.
5. A. L. L. Pun, T. Yeung, J. Lau, F. J. R. Clement, and D. Su, "Substrate noise coupling through planar spiral inductor," IEEE J. Solid-State Circuits, vol. 33, pp. 877-884, June 1998.