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Volumn 8, Issue 2, 2000, Pages 148-159

Theoretical analysis of word-level switching activity in the presence of glitching and correlation

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CORRELATION METHODS; DIGITAL FILTERS; ELECTRIC NETWORK ANALYSIS; ERROR ANALYSIS; SWITCHING CIRCUITS;

EID: 0033902316     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.831435     Document Type: Article
Times cited : (24)

References (22)
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  • 7
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    • Statistical approach to the estimation of delay-dependent switching activity in CMOS combinational circuits
    • Las Vegas, NV, June
    • Y. J. Lim, K.-I. Son, H.-J. Park, and M. Soma, "Statistical approach to the estimation of delay-dependent switching activity in CMOS combinational circuits,"in Proc. IEEE/ACM Design Automation Conf. (DAC), Las Vegas, NV, June 1996, pp. 445-450.
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    • (1995) Proc. IEEE/ACM Design Automation Conf. (DAC) , pp. 623-627
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  • 12
    • 0030383438 scopus 로고    scopus 로고
    • Register-transfer level estimation techniques for switching activity and power consumption
    • San Jose, CA, Nov.
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    • (1996) Proc. IEEE Int. Conf. Computer Aided Design (ICCAD) , pp. 158-165
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    • Roy, K.1    Prasad, S.C.2
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  • 16
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    • Theoretical analysis of word-level switching activity in the presence of glitching and correlation
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.