Theoretical analysis of word-level switching activity in the presence of glitching and correlation

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 1999, Pages 46-49

  Satyanarayana, Janardhan H ^a   Parhi, Keshab K ^a  

^a NOKIA RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CODING ERRORS; COMPUTER SIMULATION; CORRELATION THEORY; DIGITAL SIGNAL PROCESSING; NORMAL DISTRIBUTION; STATISTICS; THEOREM PROVING;

CORRELATION COEFFICIENT; GLITCHING; WORD LEVEL SWITCHING ACTIVITY;

SWITCHING CIRCUITS;

EID: 0033361729     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)