A high-performance and low-power cache architecture with speculative way-selection

IEICE Transactions on Electronics

Volumn E83-C, Issue 2, 2000, Pages 186-193

  Indue, Koji ^a   Ishihara, Tohru ^a  

^a KYUSHU UNIVERSITY   (Japan)

Author keywords

Cache; High performance; Low energy; Low power; Way prediction

Indexed keywords

ASSOCIATIVE STORAGE; COMPUTER HARDWARE; ELECTRIC POWER SUPPLIES TO APPARATUS; PROGRAM PROCESSORS;

BENCHMARK PROGRAMS; CACHE ARCHITECTURE; WAY PREDICTING SET ASSOCIATIVE CACHE;

BUFFER STORAGE;

EID: 0033891735     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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