-
1
-
-
0032266785
-
1.8 Million transistor CMOS ASIC fabricated in a SiGe BiCMOS technology
-
R. A. Johnson et al., "1.8 Million transistor CMOS ASIC fabricated in a SiGe BiCMOS technology," in IEDM Tech. Dig., 1998, pp. 217-220.
-
(1998)
IEDM Tech. Dig.
, pp. 217-220
-
-
Johnson, R.A.1
-
3
-
-
0031379773
-
Impact of extrinsic base process on NPN HBT performance and polysilicon resistor in integrated SiGe HBTs
-
S. J. Jeng et al., "Impact of extrinsic base process on NPN HBT performance and polysilicon resistor in integrated SiGe HBTs," in IEEE BCTM, 1997, pp. 187-190.
-
(1997)
IEEE BCTM
, pp. 187-190
-
-
Jeng, S.J.1
-
4
-
-
0018546024
-
Electrical trimming of heavily doped polycrystalline silicon resistors
-
Y. Amemyia, T. Ono, and K. Kato, "Electrical trimming of heavily doped polycrystalline silicon resistors," IEEE Trans. Electron Devices, vol. ED-26, pp. 1738-1742, 1979.
-
(1979)
IEEE Trans. Electron Devices
, vol.ED-26
, pp. 1738-1742
-
-
Amemyia, Y.1
T, O.2
Kato, K.3
-
5
-
-
0027814756
-
Polysilicon resistor trimming for packaged integrated circuits
-
J. A. Babcock, D. W. Feldbaumer, and V. M. Mercier, "Polysilicon resistor trimming for packaged integrated circuits," in IEDM Tech. Dig. , 1993, pp. 247-250.
-
(1993)
IEDM Tech. Dig.
, pp. 247-250
-
-
Babcock, J.A.1
Feldbaumer, D.W.2
Mercier, V.M.3
-
6
-
-
0029287706
-
Pulse current trimming of polysilicon resistors
-
D. W. Feldbaumer, J. A. Babcock, V. M. Mercier, and C. K. Y. Chun, "Pulse current trimming of polysilicon resistors," IEEE Trans. Electron Devices, vol. 42, pp. 689-696, 1995.
-
(1995)
IEEE Trans. Electron Devices
, vol.42
, pp. 689-696
-
-
Feldbaumer, D.W.1
Babcock, J.A.2
Mercier, V.M.3
Chun, C.K.Y.4
-
7
-
-
0029184885
-
Constant voltage trimming of heavily doped polysilicon resistors
-
K. Kato and T. Ono, "Constant voltage trimming of heavily doped polysilicon resistors," Jpn. J. Appl. Phys., pt. 1, vol. 34, pp. 48-53, 1995.
-
(1995)
Jpn. J. Appl. Phys.
, vol.34
, Issue.PT. 1
, pp. 48-53
-
-
Kato, K.1
Ono, T.2
-
8
-
-
0028483346
-
Electrical trimming of ion-beam-sputtered polysilicon resistors by high current pulses
-
S. Das and S. K. Lahiri, "Electrical trimming of ion-beam-sputtered polysilicon resistors by high current pulses," IEEE Trans. Electron Devices, vol. 41, no. 8, pp. 1429-1434, 1994.
-
(1994)
IEEE Trans. Electron Devices
, vol.41
, Issue.8
, pp. 1429-1434
-
-
Das, S.1
Lahiri, S.K.2
-
9
-
-
0343278060
-
-
private communication
-
private communication.
-
-
-
-
10
-
-
0343278059
-
Effects of processing temperature on device design rules for silicon/silicon germanium heterjunction bipolar transistors
-
R. Bashir et al., "Effects of processing temperature on device design rules for silicon/silicon germanium heterjunction bipolar transistors," in Proc. ESSDERC, 1997, pp. 360-363.
-
(1997)
Proc. ESSDERC
, pp. 360-363
-
-
Bashir, R.1
-
11
-
-
0020171573
-
A physical mechanism of current-induced resistance decrease in heavily doped polycrystalline silicon resistors
-
K. Kato, T. Ono, and Y. Amemyia, "A physical mechanism of current-induced resistance decrease in heavily doped polycrystalline silicon resistors," IEEE Trans. Electron Devices, vol. ED-29, pp. 1156-1161, 1982.
-
(1982)
IEEE Trans. Electron Devices
, vol.ED-29
, pp. 1156-1161
-
-
Kato, K.1
Ono, T.2
Amemyia, Y.3
-
12
-
-
0029406942
-
Theory and application of polysilicon resistor trimming
-
D. W. Feldbaumer and J. A. Babcock, "Theory and application of polysilicon resistor trimming," Solid-State Electron., vol. 38, no. 11, pp. 1861-1869, 1995.
-
(1995)
Solid-State Electron.
, vol.38
, Issue.11
, pp. 1861-1869
-
-
Feldbaumer, D.W.1
Babcock, J.A.2
-
13
-
-
0030205743
-
Change in tempetature coefficient of resistance of heavily doped polysilicon resistors caused by electrical trimming
-
K. Kato and T. Ono, "Change in tempetature coefficient of resistance of heavily doped polysilicon resistors caused by electrical trimming," Jpn. J. Appl. Phys., pt. 1, vol. 35, pp. 4209-4215, 1996.
-
(1996)
Jpn. J. Appl. Phys.
, vol.35
, Issue.PT. 1
, pp. 4209-4215
-
-
Kato, K.1
Ono, T.2
-
14
-
-
0021503073
-
A monolithic 14 Bit D/A converter fabricated with a new trimming technique (DOT)
-
K. Kato, T. Ono, and Y. Amemyia, "A monolithic 14 Bit D/A converter fabricated with a new trimming technique (DOT)," IEEE J. Solid-State Circuits, vol. SC-19, pp. 802-807, 1984.
-
(1984)
IEEE J. Solid-State Circuits
, vol.SC-19
, pp. 802-807
-
-
Kato, K.1
Ono, T.2
Amemyia, Y.3
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