MARBLE: An asynchronous on-chip macrocell bus

Microprocessors and Microsystems

Volumn 24, Issue 4, 2000, Pages 213-222

  Bainbridge, W J ^a   Furber, S B ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PERIPHERAL EQUIPMENT; NETWORK PROTOCOLS; PIPELINE PROCESSING SYSTEMS; RANDOM ACCESS STORAGE; ROM; VLSI CIRCUITS;

SYSTEM ON CHIP;

MICROPROCESSOR CHIPS;

EID: 0033724148     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0141-9331(00)00075-2     Document Type: Article

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