A DAG-based design approach for reconfigurable VLIW processors

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1999, Pages 778-779

  Alippi, Cesare ^a   Fornaciari, William ^a   Pozzi, Laura ^a   Sami, Mariagiovanna ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN APPROACHES; EMBEDDED APPLICATION; FUNCTIONAL UNITS; INSTRUCTION SET; OVERALL EXECUTION; RECONFIGURABLE; VLIW PROCESSOR;

EXHIBITIONS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

DESIGN;

EID: 27644448326     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1999.761227     Document Type: Conference Paper

References (4)

1. R Razdan and M. D. Smith. A High-Performance Microarchitecture with Hardware-Programmable Func-tional Units. Proc. MICRO-27, pages 172-180, 1994.
2. S. Hauck, T.W. Fry, M.M. Hosler, and J.P. Kao. The Chimera Reconfigurable Functional Unit. IEEE Proc. FCCM, 1997.
3. C.Alippi, W.Fornaciari, L.Pozzi, and M.G.Sami. A DAG-Based Design Approach for Reconfigurable VLIW Pro-cessors. Technical Report 98-104, Politecnico di Milano.
4. M.W.Hall et al. Maximizing Multiprocessor Performance with the SUIF Compiler. IEEE Computer, Dec 1996.