Safe and protected execution for the Morph/AMRM reconfigurable processor

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn , Issue , 1999, Pages 209-221

  Chien, Andrew A ^a   Byun, Jay H ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); INTEGRATING CIRCUITS; LOGIC DEVICES; PIPELINE PROCESSING SYSTEMS;

CRITICAL LOGIC BLOCK; RECONFIGURABLE LOGIC; RECONFIGURABLE PROCESSOR;

MICROPROCESSOR CHIPS;

EID: 0033488520     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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