Design and analysis of resonant-tunneling-diode (RTD) based high performance memory system

IEICE Transactions on Electronics

Volumn E82-C, Issue 9, 1999, Pages 1630-1636

  Uemura, Tetsuya ^a   Mazumder, Pinaki ^b  

^a NEC CORPORATION   (Japan)

^b UNIVERSITY OF MICHIGAN   (United States)

Author keywords

DRAM; Instability; Refresh free; Resonant tunneling diode; Sense amplifier

Indexed keywords

CELLULAR ARRAYS; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; QUANTUM ELECTRONICS; RANDOM ACCESS STORAGE; STABILITY; TRANSISTORS;

QUANTUM CMOS; REFRESH FREE MEMORY CELL DESIGN; RESONANT TUNNELING DIODES; SENSE AMPLIFIER; STABILITY ANALYSIS;

TUNNEL DIODE AMPLIFIERS;

EID: 0033322861     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (4)

1. K. Kim, C-G. Hwang, and J.G. Lee, "DRAM technology perspective for Gigabit era," IEEE Trans. Electron Devices, vol.45, pp.598-608, 1998.
2. P. Mazumder, S. Kulkarni, M. Bhattacharya, J.P. Sun, and G.I. Haddad, "Digital circuit application of resonant tunneling devices," Proc. IEEE, vol.86, pp.664-686, 1998.
3. P. van der Wagt, A. Seabaugh, and E. Beam III, "RTD/HFET low standby power SRAM gain cell," 1996 IEDM Tech. Dig., pp.425-428, 1996.
4. H. Yamauchi, T. Suzuki, A. Sawada, T. Iwata, T. Tsuji, M. Agata, T. Taniguchi, Y. Odake, K. Sawada, T. Ohnishi, M. Fukumoto, T. Fujita, and M. Inoue, "A 20ns battery-operated 16Mb CMOS DRAM," 1993 ISSCC Tech. Dig., pp.44-45, 1993.