Challenge and prospects for silicon SET/FET hybrid circuits

Physica B: Condensed Matter

Volumn 272, Issue 1-4, 1999, Pages 522-526

  Toriumi, A ^a   Uchida, K ^a   Ohba, R ^a   Koga, J ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; INTEGRATED CIRCUIT MANUFACTURE; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES;

SINGLE-ELECTRON TUNNELING (SET) DEVICES;

CMOS INTEGRATED CIRCUITS;

EID: 0033320539     PISSN: 09214526     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0921-4526(99)00392-0     Document Type: Article

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