Characterisation of offset lithographic films using microelectronic test structures

IEICE Transactions on Electronics

Volumn E82-C, Issue 4, 1999, Pages 576-581

  Walton, Anthony J ^a,b,c   Tom M Stevenson, J ^a   Haworth, Leslie I ^a   Fallon, Martin ^a   Evans, Peter S A ^a   Ramsey, Blue J ^a   Harrison, David ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

^b National Semiconductor Corp   (United Kingdom)

^c BRUNEL UNIVERSITY   (United Kingdom)

Author keywords

Linewidth; Microelectronics; Offset lithography; Test structures

Indexed keywords

ELECTRIC RESISTANCE; INK; INTEGRATED CIRCUIT TESTING; LITHOGRAPHY; PRINTED CIRCUIT BOARDS; PRINTING; SUBSTRATES; SURFACE MEASUREMENT; THIN FILMS;

MICROELECTRONIC TEST STRUCTURES; OFFSET LITHOGRAPHIC FILMS; SHEET RESISTANCE; TECHNOLOGY CIRCUIT TRACKS;

MICROELECTRONIC PROCESSING;

EID: 0033312310     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (10)

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10. M.W. Cresswell, N.M.P. Guillaume, R.A. Allen, W.F. Guthric, and L.W. Linholm, "Extraction of sheet-resistance from van-der-Pau\v resistors replicated in monocrystalline films having non-planar geometries," IEEE Proc. International Conference on Microelectronic Test Structures, pp.29-38, Kanazawa, Japan, March 23-26, 1998.