A large-signal model of self-aligned gate gaas fet's for high-efficiency power-amplifier design

IEEE Transactions on Microwave Theory and Techniques

Volumn 47, Issue 12, 1999, Pages 2375-2381

  Hirose, Mayumi ^a   Kitaura, Yoshiaki ^a   Uchitomi, Naotaka ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; ELECTROMAGNETIC DISPERSION; GATES (TRANSISTOR); INTERMODULATION; ION IMPLANTATION; POWER AMPLIFIERS; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR DEVICE MODELS; SIGNAL DISTORTION;

INTERMODULATION DISTORTION (IMD); LOAD-PULL SIMULATION; MICROWAVE FIELD EFFECT TRANSISTORS (FEM);

MESFET DEVICES;

EID: 0033281450     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/22.808984     Document Type: Article

References (14)

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