The memory/logic interface in FPGA's with large embedded memory arrays

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 7, Issue 1, 1999, Pages 80-91

  Wilton, Steven J E ^a,b   Rose, Jonathan ^a,c   Vranesic, Zvonko G ^a,c  

^a IEEE   (Canada)

^b UNIVERSITY OF BRITISH COLUMBIA   (Canada)

^c UNIVERSITY OF TORONTO   (Canada)

Author keywords

Embedded memory arrays; FPGA's; Reconfigurable systems

Indexed keywords

LOGIC DESIGN; MICROPROCESSOR CHIPS;

EMBEDDED MEMORY ARRAYS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0033097631     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.748203     Document Type: Article

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